PCB Details
Part No: 04B-005
Title: Common Emitter Amplifier
Board Size: Approx. 50 x 50 mm
Pieces per Panel: 4
Panel Size: 100 x 100 mm (V-scored)
This miniPCB implements a single-stage common emitter amplifier designed around a discrete NPN bipolar junction transistor (Q1), with optional substitution for an N-channel JFET or MOSFET. The amplifier may be used to demonstrate voltage gain, phase inversion, and the effects of feedback and biasing techniques.
Power Supply Conditioning
Capacitors C1 and C3 serve as power rail decoupling and filtering elements, suppressing high-frequency noise and stabilizing the DC supply voltage. Test points TP3 (V+) and TP4 (GND) are provided for measuring supply and ground reference levels.

Input Coupling and Biasing
The AC input signal is capacitively coupled to the amplifier via C2, which blocks DC offset from the signal source, ensuring proper biasing of the transistor base.
Test points TP1 and TP2 allow voltage measurements across this input coupling capacitor.
Biasing of the transistor base is achieved through a resistor divider network consisting of R1, R2, and R3, with R2 implemented as a multiturn potentiometer for fine adjustment of the base voltage and operating point. This sets the quiescent collector current and ensures linear amplifier operation in the active region.
Test points TP5 and TP6 monitor voltages at key nodes within this bias network.
Feedback Network
A resistive-capacitive feedback loop composed of R10 and C5 connects the transistor's collector to its base. This provides frequency-dependent negative feedback that stabilizes gain, reduces distortion, and improves bandwidth. TP11 allows direct access to a point within this feedback path for analysis. Jumper J2 allows the feedback network to be removed from the circuit.
Collector Network and Output
The collector load consists of R4, R7, and R8, with R7 as a multiturn potentiometer to adjust gain or output bias. These resistors determine the voltage drop across the collector and directly affect the voltage gain. TP9 and TP10 are used to probe the collector and output signal path.
Emitter Network and Stability
The emitter is grounded through a multi-resistor network consisting of R5, R6, and R9 (with R9 being adjustable). These resistors set the emitter current and provide thermal stability through negative feedback. The AC bypass capacitor C4 is placed in parallel with part of the emitter resistance to increase gain at higher frequencies by reducing AC degeneration. TP7 and TP8 enable measurement of the emitter voltage and overall emitter network behavior. Jumper J1 allows the emitter network to be removed from the circuit.
Transistor Configuration
Q1 serves as the active amplifying device in the common emitter configuration. In the provided schematic, Q1 is a general-purpose NPN BJT. However, the board layout and biasing are designed to accommodate equivalent N-channel field-effect transistors (JFETs or MOSFETs) for experimentation with different semiconductor technologies.
Schematic

Board Layout
